1. Field of the Invention
This invention relates to a method of fabricating a ridge waveguide semiconductor light-emitting device in which the carrier concentration at the top surface of the ridge waveguide is higher than that at the lower portion thereof.
2. Description of Prior Arts
Semiconductor light-emitting devices have been widely developed due to the demands of data transmission and storage. Specially, a semiconductor laser can obtain a better performance for use in light transmission or storage partially because of its narrow frequency spectral width. Nowadays, there are various kinds of fabrication methods for semiconductor lasers. Further, a single mode semiconductor laser can prevent astigmatism and reduce the ratio of longitudinal and transversal divergence of the laser beam. Therefore, many conventional methods are provided to restrict the current to flow into the active layer through the vertex of the ridge waveguide only. Thus, the light-emitting region is restricted to the area of active layer under the ridge waveguide, thereby obtaining a single mode semiconductor laser. The conventional methods of restricting the flow of current include a method in which an insulating layer such as SiO.sub.2, Si.sub.3 N.sub.4, etc., is coated on the chip except for the ridge waveguide to restrict the flow of current. U.S. Pat. Nos. 5,550,081 and 5,403,775 disclose the method of oxidizing the aluminum included in the epitaxial-layers to form an insulating layer of Al.sub.2 O.sub.3 so as to restrict the flow of current. U.S. Pat. No. 5,658,824 discloses a method of coating epoxy resin on the chip except for the ridge waveguide. Furthermore, U.S. Pat. No. 5,351,258 discloses a method of coating SiO.sub.2 and epoxy resin to restrict the current. Additionally, U.S. Pat. No. 5,304,507 discloses a method to re-grow a semiconductor epitaxial layer of another conductivity type or an insulating on the chip except for the ridge waveguide by an epitaxial method so as to restrict the area and position of the active layer through which the current can flow.
In Taiwanese Patent Application No. 87109771, a self-aligned process for fabricating semiconductor lasers is disclosed, which includes the steps of: (1) referring to FIG. 1a, sequentially forming an n-AlInP layer 12, an undoped AlGaInP layer 13, a quantum-well active layer 14, an undoped AlGaInP layer 15, a p-AlInP layer 16, a p-GaInP layer 18, a p-GaAs layer 20 and a SiO.sub.2 layer 22 on the substrate 10; (2) referring to FIG. 1b, forming a photoresist layer 24 thereon and patterning the photoresist layer 24 by a photolithography process; (3) referring to FIG. 1c, etching the SiO.sub.2 layer 22 that is not covered by the patterned photoresist layer 24; (4) referring to FIG. 1d, removing the photoresist layer 24; (5) referring to FIG. 1e, etching the above epitaxial layers very close to the AlGaInP layer 15; (6) referring to FIG. 1f, removing the SiO.sub.2 layer 22; (7) referring to FIG. 1g, depositing a Si.sub.3 N.sub.4 layer 26 thereon; (8) referring to FIG. 1h, forming a first photoresist layer 28; (9) referring to FIG. 1i, then forming a second photoresist layer 30, and patterning the second photoresist layer 30; (10) referring to FIG. 1j, etching the first photoresist layer 28 by a dry etching process until the Si.sub.3 N.sub.4 layer 26 on the ridge waveguide is not covered by the first photoresist layer 28; (11) referring to FIG. 1k, etching the Si.sub.3 N.sub.4 layer 26 to expose the top surface of ridge waveguide; (12) referring to FIG. 11, removing the second photoresist layer 30 and the first photoresist layer 28; (13) referring to FIG. 1m, forming a metal layer thereon. In this conventional process, an insulator is formed on the chip except for the ridge waveguide to restrict the flow of current. Such a conventional process is complex since it includes 13 steps, and it normally takes about 2 working days to accomplish.